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MX23C6410
64M-BIT Mask ROM (8/16 Bit Output) For SOP and TSOP Packages
FEATURES
* Bit organization - 8M x 8 (byte mode) - 4M x 16 (word mode) * Fast access time - Random access: 100ns (max.) * Current - Operating: 70mA - Standby: 100uA (max.) * Supply voltage - 5V10% * Package - 44 pin SOP (500 mil) - 48 pin TSOP (12mm x 20mm)
ORDER INFORMATION
Part No. Access Time MX23C6410MC-10 100ns MX23C6410MC-12 120ns MX23C6410MC-15 150ns MX23C6410TC-10 100ns MX23C6410TC-12 120ns MX23C6410TC-15 150ns MX23C6410RC-10 100ns MX23C6410RC-12 MX23C6410RC-15 120ns 150ns Package 44 pin SOP 44 pin SOP 44 pin SOP 48 pin TSOP 48 pin TSOP 48 pin TSOP 48 pin TSOP (Reverse type) 48 pin TSOP (Reverse type) 48 pin TSOP (Reverse type)
PIN CONFIGURATION
44 SOP
A21 A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE VSS OE D0 D8 D1 D9 D2 D10 D3 D11 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A20 A19 A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE VSS D15/A-1 D7 D14 D6 D13 D5 D12 D4 VCC
48 TSOP (NORMAL TYPE)
BYTE A16 A15 A14 A13 A12 A11 A10 A9 A8 A19 A21 A20 A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 VSS VSS D15/A-1 D7 D14 D6 D13 D5 D12 D4 VCC VCC NC D11 D3 D10 D2 D9 D1 D8 D0 OE VSS VSS
MX23C6410
48 TSOP (REVERSE TYPE)
VSS VSS D15/A-1 D7 D14 D6 D13 D5 D12 D4 VCC VCC NC D11 D3 D10 D2 D9 D1 D8 D0 OE VSS VSS 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 BYTE A16 A15 A14 A13 A12 A11 A10 A9 A8 A19 A21 A20 A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE
MX23C6410 (Normal Type)
MX23C6410 (Reverse Type)
P/N:PM0406
REV. 2.7, JAN. 15, 2002
1
MX23C6410
PIN DESCRIPTION
Symbol A0~A21 D0~D14 D15/A-1 CE OE Byte VCC VSS NC Pin Function Address Inputs Data Outputs D15 (Word Mode) / LSB Address (Byte Mode) Chip Enable Input Output Enable Input Word / Byte Mode Selection Power Supply Pin Ground Pin No Connection
MODE SELECTION CE H L L L OE X H L L Byte X X H L D15/A-1 X X Output Input D0~D7 High Z High Z D0~D7 D0~D7 D8~D15 High Z High Z D8~D15 High Z Mode Word Byte Power Stand-by Active Active Active
BLOCK DIAGRAM
A0/(A-1) A21 CE BYTE OE
Address Buffer
Memory Array
Page Buffer
Word/ Byte
Output Buffer
D0 D15/(D7)
P/N:PM0406
REV. 2.7, JAN. 15, 2002
2
MX23C6410
ABSOLUTE MAXIMUM RATINGS
Item Voltage on any Pin Relative to VSS Ambient Operating Temperature Storage Temperature Symbol VIN Topr Tstg Ratings -0.8V to VCC+2.0V (Note) 0 to 70 C C -65 to 125 C C
Note: Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions, inputs may undershoot VSS to -0.8V for periods of up to 20ns. Maximum DC voltage on input or I/ O pins is VCC+0.5V. During voltage transitions, input may overshoot VCC to VCC+2.0V for periods of up to 20ns.
DC CHARACTERISTICS (Ta = 0C ~ 70C, VCC = 5V10%)
Item Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Input Leakage Current Output Leakage Current Operating Current Standby Current (TTL) Standby Current (cmos) Input Capacitance Output Capacitance Symbol VOH VOL VIH VIL ILI ILO ICC1 ISTB1 ISTB2 CIN COUT MIN. 2.4V 2.2V -0.3V MAX. 0.4V VCC+0.3V 0.8V 5uA 5uA 70mA 1mA 100uA 10pF 10pF Conditions IOH = -1.0mA IOL = 2.1mA
0V, VCC 0V, VCC f=5MHz, all output open CE = VIH CE>VCC-0.2V Ta = 25 f = 1MHZ C, Ta = 25 f = 1MHZ C,
AC CHARACTERISTICS (Ta = 0C ~ 70C, VCC = 5V10%)
Item Read Cycle Time Address Access Time Chip Enable Access Time Output Enable Time Output Hold After Address Output High Z Delay Symbol tRC tAA tACE tOE tOH tHZ 23C6410-10 MIN. MAX. 100ns 100ns 100ns 50ns 0ns 20ns 23C6410-12 MIN. MAX. 120ns 120ns 120ns 60ns 0ns 20ns 23C6410-15 MIN. MAX. 150ns 150ns 150ns 70ns 0ns 20ns
Note:Output high-impedance delay (tHZ) is measured from OE or CE going high, and this parameter guaranteed by design over the full voltage and temperature operating range not tested.
P/N:PM0406
REV. 2.7, JAN. 15, 2002
3
MX23C6410
AC Test Conditions
Input Pulse Levels Input Rise and Fall Times Input Timing Level Output Timing Level Output Load 0.4V~ 2.4V 10ns 1.4V 0.8V and 2.0V See Figure
IOH (load)=-1mA DOUT IOL (load)=2.1mA
C<100pF
Note:No output loading is present in tester load board. Active loading is used and under software programming control. Output loading capacitance includes load board's and all stray capacitance.
TIMING DIAGRAM
RANDOM READ
ADD
ADD
tACE
ADD
tRC
ADD
CE
tOE
OE
tAA tOH tHZ
DATA
VALID
VALID
VALID
Note:CE, OE are enable
P/N:PM0406
REV. 2.7, JAN. 15, 2002
4
MX23C6410
PACKAGE INFORMATION
44-PIN PLASTIC SOP
P/N:PM0406
REV. 2.7, JAN. 15, 2002
5
MX23C6410
48-PIN PLASTIC TSOP
P/N:PM0406
REV. 2.7, JAN. 15, 2002
6
MX23C6410
REVISION HISTORY
Revision 2.1 2.2 2.3 2.4 2.5 2.6 2.7 Description AC Characteristics: tOH 10ns --> 0ns Add Order Information--Note:MX23C6410PC-10 only applys to supply voltage 5V5% Modify Package Information Modify Operating Current:100mA-->70mA Modify Package Information Added 44-pin TSOP package Move 42-pin PDIP Package to another new data sheet Removed 44-pin TSOP Package Page P3 P1 P5,6,7 P1,3 P5~7 P1,8 P1,5 P1,7 Date FEB/01/1999 OCT/02/2000 OCT/09/2000 JAN/15/2001 JUL/17/2001 JUL/20/2001 JAN/15/2002
P/N:PM0406
REV. 2.7, JAN. 15, 2002
7
MX23C6410
MACRONIX INTERNATIONAL CO., LTD.
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http : //www.macronix.com
MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.

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